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| author | Anton Sidorenko <anton.sidorenko@syntacore.com> | 2024-06-25 11:34:59 +0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-25 11:34:59 +0300 |
| commit | 2d84e0ffefda62da6193d339633dbb55654f7b5d (patch) | |
| tree | e7fe7e79fd176432a21a128fa1ccbda9747096df /llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | |
| parent | d78211912391b724a064ef017dbf239eff10380a (diff) | |
| download | llvm-2d84e0ffefda62da6193d339633dbb55654f7b5d.zip llvm-2d84e0ffefda62da6193d339633dbb55654f7b5d.tar.gz llvm-2d84e0ffefda62da6193d339633dbb55654f7b5d.tar.bz2 | |
[RISCV] Add scheduling model for Syntacore SCR3 (#95427)
Syntacore SCR3 is a microcontroller-class processor core. Overview:
https://syntacore.com/products/scr3
Co-authored-by: Dmitrii Petrov <dmitrii.petrov@syntacore.com>
Diffstat (limited to 'llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp')
0 files changed, 0 insertions, 0 deletions