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author | Simon Dardis <simon.dardis@imgtec.com> | 2017-07-13 11:28:05 +0000 |
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committer | Simon Dardis <simon.dardis@imgtec.com> | 2017-07-13 11:28:05 +0000 |
commit | 250256f9c95750ad63ee5a2d22cc6a22380ec9e9 (patch) | |
tree | 24e1120db9486d157b7dc2d1903337bab1ae125e /llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | |
parent | 10db8ce290a82b68230add5126634e82c9f90c99 (diff) | |
download | llvm-250256f9c95750ad63ee5a2d22cc6a22380ec9e9.zip llvm-250256f9c95750ad63ee5a2d22cc6a22380ec9e9.tar.gz llvm-250256f9c95750ad63ee5a2d22cc6a22380ec9e9.tar.bz2 |
Reland "[mips] Fix multiprecision arithmetic."
For multiprecision arithmetic on MIPS, rather than using ISD::ADDE / ISD::ADDC,
get SelectionDAG to break down the operation into ISD::ADDs and ISD::SETCCs.
For MIPS, only the DSP ASE has a carry flag, so in the general case it is not
useful to directly support ISD::{ADDE, ADDC, SUBE, SUBC} nodes.
Also improve the generation code in such cases for targets with
TargetLoweringBase::ZeroOrOneBooleanContent by directly using the result of the
comparison node rather than using it in selects. Similarly for ISD::SUBE /
ISD::SUBC.
Address optimization breakage by moving the generation of MIPS specific integer
multiply-accumulate nodes to before legalization.
This revolves PR32713 and PR33424.
Thanks to Simonas Kazlauskas and Pirama Arumuga Nainar for reporting the issue!
Reviewers: slthakur
Differential Revision: https://reviews.llvm.org/D33494
The previous version of this patch was too aggressive in producing fused
integer multiple-addition instructions.
llvm-svn: 307906
Diffstat (limited to 'llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp')
0 files changed, 0 insertions, 0 deletions