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| author | Ties Stuij <ties.stuij@arm.com> | 2022-12-06 10:44:05 +0000 |
|---|---|---|
| committer | Ties Stuij <ties@stuij.se> | 2022-12-06 10:48:21 +0000 |
| commit | eaea4608e645e36962541f8fe03a8afc1139ed2a (patch) | |
| tree | c8787eea3ba5ba3f848c372e132e83b7d667f7ac /llvm/lib/Transforms/Utils/Local.cpp | |
| parent | 9f85af54d7363139fc6afc6403a224bc0a1b4c03 (diff) | |
| download | llvm-eaea4608e645e36962541f8fe03a8afc1139ed2a.zip llvm-eaea4608e645e36962541f8fe03a8afc1139ed2a.tar.gz llvm-eaea4608e645e36962541f8fe03a8afc1139ed2a.tar.bz2 | |
[AArch64] lower abs intrinsic to new ABS instruction in SelDag
When feature CSSC is available, the SelectionDag abs intrinsic should map to the
new scalar ABS instruction.
Additionally, the SIMDTwoScalarD tablegen defm includes a pattern match for
scalar i64, which we don't want to use when CSSC is enabled.
spec:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/ABS--Absolute-value-
Reviewed By: lenary
Differential Revision: https://reviews.llvm.org/D138812
Diffstat (limited to 'llvm/lib/Transforms/Utils/Local.cpp')
0 files changed, 0 insertions, 0 deletions