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| author | Craig Topper <craig.topper@intel.com> | 2017-11-06 22:49:01 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-11-06 22:49:01 +0000 |
| commit | cb6c38612e7b46d92820a5e000ddc9532086b20f (patch) | |
| tree | 425b5ae432edaa72281f963f9ea960a5ddfcb3cf /llvm/lib/Transforms/Utils/Local.cpp | |
| parent | 86d24f1668aaeb41362031fa31b4c4269488a68b (diff) | |
| download | llvm-cb6c38612e7b46d92820a5e000ddc9532086b20f.zip llvm-cb6c38612e7b46d92820a5e000ddc9532086b20f.tar.gz llvm-cb6c38612e7b46d92820a5e000ddc9532086b20f.tar.bz2 | |
[X86] Make FeatureAVX512 imply FeatureFMA.
Previously our VEX patterns were checking Subtarget.hasFMA() which checked FMA || AVX512. So we were behaving as if AVX512 implied it anyway. Which means we'd allow VEX encoded 128/256 FMA when AVX512F was enabled but AVX512VL is off. Regardless of the FMA flag.
EVEX to VEX also transforms scalar EVEX FMA instructions to their VEX versions even without the FMA flag. Similarly for 128/256 under AVX512VL.
So this makes AVX512 imply FeatureFMA to make our current behavior explicit.
All known CPUs that support AVX512 have VEX FMA instructions.
llvm-svn: 317520
Diffstat (limited to 'llvm/lib/Transforms/Utils/Local.cpp')
0 files changed, 0 insertions, 0 deletions