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| author | James Westwood <james.westwood@arm.com> | 2024-03-04 12:00:36 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-04 12:00:36 +0000 |
| commit | 00e4a4197137410129d4725ffb82bae9ce44bdde (patch) | |
| tree | 1765e608d966dac66e6e0e4eff361af0a78ba942 /llvm/lib/Transforms/Utils/InlineFunction.cpp | |
| parent | 8f30b62395ff9a41fd66ef0f3a98bceffa0bf121 (diff) | |
| download | llvm-00e4a4197137410129d4725ffb82bae9ce44bdde.zip llvm-00e4a4197137410129d4725ffb82bae9ce44bdde.tar.gz llvm-00e4a4197137410129d4725ffb82bae9ce44bdde.tar.bz2 | |
[ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (#82801)
When code for M class architecture was compiled with AAPCS and PAC
enabled, the frame pointer, r11, was not pushed to the stack adjacent to
the link register. Due to PAC being enabled, r12 was placed between r11
and lr. This patch fixes this by adding an extra case to the already
existing code that splits the GPR push in two when R11 is the frame
pointer and certain paremeters are met. The differential revision for
this previous change can be found here:
https://reviews.llvm.org/D125649. This now ensures that r11 and lr are
pushed in a separate push instruction to the other GPRs when PAC and
AAPCS are enabled, meaning the frame pointer and link register are now
pushed onto the stack adjacent to each other.
Diffstat (limited to 'llvm/lib/Transforms/Utils/InlineFunction.cpp')
0 files changed, 0 insertions, 0 deletions