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| author | Sam Parker <sam.parker@arm.com> | 2018-08-29 10:39:03 +0000 |
|---|---|---|
| committer | Sam Parker <sam.parker@arm.com> | 2018-08-29 10:39:03 +0000 |
| commit | 96d48728990ca497f571b53bacafaa5b71eeafdf (patch) | |
| tree | d6131006cde079dd4797d9f001024bd9fad07334 /llvm/lib/Transforms/Utils/GuardUtils.cpp | |
| parent | 39715e3a664413b5c4b449869c1b8911d3abdde0 (diff) | |
| download | llvm-96d48728990ca497f571b53bacafaa5b71eeafdf.zip llvm-96d48728990ca497f571b53bacafaa5b71eeafdf.tar.gz llvm-96d48728990ca497f571b53bacafaa5b71eeafdf.tar.bz2 | |
[ARM] Set __ARM_FEATURE_SIMD32 for +dsp cores
ARM_FEATURE_DSP is already set for targets with the +dsp feature. In
the backend, this target feature is also used to represent the
availability of the of the instructions that the ACLE guard through
the __ARM_FEATURE_SIMD32 macro. We don't have any cores that
implement one and not the other, so set this macro for cores later
than V6 or for Cortex-M cores that the target parser, or user, reports
that the 'dsp' instructions are supported.
Differential Revision: https://reviews.llvm.org/D51093
llvm-svn: 340911
Diffstat (limited to 'llvm/lib/Transforms/Utils/GuardUtils.cpp')
0 files changed, 0 insertions, 0 deletions