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| author | Tim Renouf <tpr.llvm@botech.co.uk> | 2018-08-25 14:53:17 +0000 |
|---|---|---|
| committer | Tim Renouf <tpr.llvm@botech.co.uk> | 2018-08-25 14:53:17 +0000 |
| commit | 904343f879b34b44185f60d277ab568342d62bf8 (patch) | |
| tree | 55f72ff11c123ab98a29f38fe0d96efc18da63df /llvm/lib/Transforms/Utils/DemoteRegToStack.cpp | |
| parent | 57a0b4edd76a2a10d1d85332e538661ee8ad2459 (diff) | |
| download | llvm-904343f879b34b44185f60d277ab568342d62bf8.zip llvm-904343f879b34b44185f60d277ab568342d62bf8.tar.gz llvm-904343f879b34b44185f60d277ab568342d62bf8.tar.bz2 | |
[AMDGPU] Add support for multi-dword s.buffer.load intrinsic
Summary:
Patch by Marek Olsak and David Stuttard, both of AMD.
This adds a new amdgcn intrinsic supporting s.buffer.load, in particular
multiple dword variants. These are convenient to use from some front-end
implementations.
Also modified the existing llvm.SI.load.const intrinsic to common up the
underlying implementation.
This modification also requires that we can lower to non-uniform loads correctly
by splitting larger dword variants into sizes supported by the non-uniform
versions of the load.
V2: Addressed minor review comments.
V3: i1 glc is now i32 cachepolicy for consistency with buffer and
tbuffer intrinsics, plus fixed formatting issue.
V4: Added glc test.
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D51098
Change-Id: I83a6e00681158bb243591a94a51c7baa445f169b
llvm-svn: 340684
Diffstat (limited to 'llvm/lib/Transforms/Utils/DemoteRegToStack.cpp')
0 files changed, 0 insertions, 0 deletions