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| author | Pengcheng Wang <wangpengcheng.pp@bytedance.com> | 2025-02-14 17:35:02 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-02-14 17:35:02 +0800 |
| commit | 7eadc1960d199676f04add402bb0aa6f65b7b234 (patch) | |
| tree | d3c20748d5507d52301e2bc382580ad224257ee3 /llvm/lib/Transforms/Utils/Debugify.cpp | |
| parent | 606ff7ea9b29f93e536b13c83dc24de6b8a4e8cd (diff) | |
| download | llvm-7eadc1960d199676f04add402bb0aa6f65b7b234.zip llvm-7eadc1960d199676f04add402bb0aa6f65b7b234.tar.gz llvm-7eadc1960d199676f04add402bb0aa6f65b7b234.tar.bz2 | |
[RISCV] Add a generic OOO CPU (#120712)
We add a generic out-of-order CPU model here just like what GCC
has done.
People may use this model to evaluate some optimizations, and more
importantly, people can use this model as a template to customize
their own CPU models.
The design (units, cycles, ...) of this model is random so don't
take it seriously.
Diffstat (limited to 'llvm/lib/Transforms/Utils/Debugify.cpp')
0 files changed, 0 insertions, 0 deletions