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| author | SpencerAbson <Spencer.Abson@arm.com> | 2024-10-31 14:30:11 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-31 14:30:11 +0000 |
| commit | c485ee1968831e72778e1258d467022be62fa3f5 (patch) | |
| tree | 9b40469dfaee84e9d4c47bebeafeb57f1b992cfe /llvm/lib/Transforms/Utils/BuildLibCalls.cpp | |
| parent | 31faa39c923559c14647fc878216a78282f9355f (diff) | |
| download | llvm-c485ee1968831e72778e1258d467022be62fa3f5.zip llvm-c485ee1968831e72778e1258d467022be62fa3f5.tar.gz llvm-c485ee1968831e72778e1258d467022be62fa3f5.tar.bz2 | |
[AArch64] Add assembly/disassembly for zeroing SVE REV{B,H,W,D} and RBIT (#114110)
This patch adds assembly/disassembly for the following SVE2.2
instructions
- RBIT (zeroing)
- REVB (zeroing)
- REVH (zeroing)
- REVW (zeroing)
- REVD (zeroing)
- In accordance with:
https://developer.arm.com/documentation/ddi0602/2024-09/SVE-Instructions
Co-authored-by: Marian Lukac marian.lukac@arm.com
Diffstat (limited to 'llvm/lib/Transforms/Utils/BuildLibCalls.cpp')
0 files changed, 0 insertions, 0 deletions