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| author | zhijian lin <zhijian@ca.ibm.com> | 2025-10-21 09:37:30 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-21 09:37:30 -0400 |
| commit | 7aa6c62bdba16731443dc0540f2addc58610a1a1 (patch) | |
| tree | 941e825f991a02c6c3c8cc4abc120f146d41cd14 /llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | |
| parent | bffdf0b408f5cb664cad928c4e79d23620ba9c08 (diff) | |
| download | llvm-7aa6c62bdba16731443dc0540f2addc58610a1a1.zip llvm-7aa6c62bdba16731443dc0540f2addc58610a1a1.tar.gz llvm-7aa6c62bdba16731443dc0540f2addc58610a1a1.tar.bz2 | |
[PowecPC] Hint branch `bne-` for atomic operation after the store-conditional (#152529)
The branches emitted for atomic operations after the store-conditional
are currently not hinted, even though they should be.
According to the Power10 Processor Chip User’s Manual:
` “Without static prediction, if the lock is not acquired in the first
iteration, the branch history mechanism works to update the prediction
to predict taken; that is, predict lock acquisition failure and cause
more lwarx traffic for the next iteration.”`
This patch addresses the issue by adding explicit branch hints for
atomic operations after the store-conditional.
Diffstat (limited to 'llvm/lib/Transforms/Utils/BasicBlockUtils.cpp')
0 files changed, 0 insertions, 0 deletions
