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| author | Craig Blackmore <craig.blackmore@embecosm.com> | 2020-12-18 16:57:01 +0000 |
|---|---|---|
| committer | Simon Cook <simon.cook@embecosm.com> | 2020-12-18 16:57:05 +0000 |
| commit | 698ae90f306248aafbfb5c85cdd9bb81c387bb59 (patch) | |
| tree | c5d8aba84cab6488ef0a99a404d7e44db24fef0e /llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | |
| parent | 06d5b1c9ad52476e845f969cf82e00e383f9cf40 (diff) | |
| download | llvm-698ae90f306248aafbfb5c85cdd9bb81c387bb59.zip llvm-698ae90f306248aafbfb5c85cdd9bb81c387bb59.tar.gz llvm-698ae90f306248aafbfb5c85cdd9bb81c387bb59.tar.bz2 | |
[RegisterScavenging] Fix assert in scavengeRegisterBackwards
According to the documentation, if a spill is required to make a
register available and AllowSpill is false, then NoRegister should be
returned, however, this scenario was actually triggering an assertion
failure.
This patch moves the assertion after the handling of AllowSpill.
Authored by: Lewis Revill
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D92104
Diffstat (limited to 'llvm/lib/Transforms/Utils/BasicBlockUtils.cpp')
0 files changed, 0 insertions, 0 deletions