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| author | Craig Topper <craig.topper@intel.com> | 2020-02-20 13:28:12 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2020-02-20 15:13:45 -0800 |
| commit | 5228a5544b2c887dab3aede7baf818ca4244141e (patch) | |
| tree | 6c97ec6345a1347131cfdd0a339e20ba9ac6b2ec /llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | |
| parent | d95a10a7f976188e4ffec77d82000afc53a6d39a (diff) | |
| download | llvm-5228a5544b2c887dab3aede7baf818ca4244141e.zip llvm-5228a5544b2c887dab3aede7baf818ca4244141e.tar.gz llvm-5228a5544b2c887dab3aede7baf818ca4244141e.tar.bz2 | |
[X86] Fix a couple copy mistakes in v4i1 or/and/xor isel patterns.
VK1 was being used as the output of the copy to regclass, but it
should be VK2/VK4. Shouldn't matter in practice though since
VK1/VK2/VK4/VK8/VK16 are all identicaly and just have different VTs.
Diffstat (limited to 'llvm/lib/Transforms/Utils/BasicBlockUtils.cpp')
0 files changed, 0 insertions, 0 deletions