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| author | Jingu Kang <jingu.kang@arm.com> | 2023-06-15 17:19:35 +0100 |
|---|---|---|
| committer | Jingu Kang <jingu.kang@arm.com> | 2023-06-16 17:13:45 +0100 |
| commit | 82d330e0e04a55ee95dc93980761545a01543fde (patch) | |
| tree | 2a8e8f9cded0b890c916787242551b6e1e48e50d /llvm/lib/Transforms/Utils/ASanStackFrameLayout.cpp | |
| parent | ed34cb2cd78143a3ec99a91fe2db79bdb1ddfd85 (diff) | |
| download | llvm-82d330e0e04a55ee95dc93980761545a01543fde.zip llvm-82d330e0e04a55ee95dc93980761545a01543fde.tar.gz llvm-82d330e0e04a55ee95dc93980761545a01543fde.tar.bz2 | |
[AArch64] Try to convert vector shift operation into vector add operation
The vector shift instructions tend to be worse than ADD/SUB on AArch64 cores
so this patch supports tablegen patterns for below simple transformation.
x << 1 ==> x + x
Differential Revision: https://reviews.llvm.org/D153049
Diffstat (limited to 'llvm/lib/Transforms/Utils/ASanStackFrameLayout.cpp')
0 files changed, 0 insertions, 0 deletions