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| author | Craig Topper <craig.topper@gmail.com> | 2016-05-26 04:28:45 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-05-26 04:28:45 +0000 |
| commit | a423aa4642f4272a108ce0a6c8f833afc18a6438 (patch) | |
| tree | 419d27484e18aa0c5a5290002bd90097324dab23 /llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | |
| parent | 0bc8994a4cf1e2a2c69629a613263b741b87f2fc (diff) | |
| download | llvm-a423aa4642f4272a108ce0a6c8f833afc18a6438.zip llvm-a423aa4642f4272a108ce0a6c8f833afc18a6438.tar.gz llvm-a423aa4642f4272a108ce0a6c8f833afc18a6438.tar.bz2 | |
[X86] Add the AVX storeu intrinsics to InstCombine and LoopStrengthReduce in the same places that the SSE/SSE2 storeu intrinsics appear.
I don't really know how to test this. Just seemed like we should be consistent.
llvm-svn: 270819
Diffstat (limited to 'llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp')
| -rw-r--r-- | llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp index b5afe0a..ad70a70 100644 --- a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp +++ b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp @@ -687,6 +687,9 @@ static bool isAddressUse(Instruction *Inst, Value *OperandVal) { case Intrinsic::x86_sse_storeu_ps: case Intrinsic::x86_sse2_storeu_pd: case Intrinsic::x86_sse2_storeu_dq: + case Intrinsic::x86_avx_storeu_ps_256: + case Intrinsic::x86_avx_storeu_pd_256: + case Intrinsic::x86_avx_storeu_dq_256: if (II->getArgOperand(0) == OperandVal) isAddress = true; break; @@ -711,6 +714,9 @@ static MemAccessTy getAccessType(const Instruction *Inst) { case Intrinsic::x86_sse_storeu_ps: case Intrinsic::x86_sse2_storeu_pd: case Intrinsic::x86_sse2_storeu_dq: + case Intrinsic::x86_avx_storeu_ps_256: + case Intrinsic::x86_avx_storeu_pd_256: + case Intrinsic::x86_avx_storeu_dq_256: AccessTy.MemTy = II->getArgOperand(0)->getType(); break; } |