diff options
| author | Lawrence Benson <github@lawben.com> | 2023-08-11 09:59:20 +0200 |
|---|---|---|
| committer | Lawrence Benson <github@lawben.com> | 2023-08-11 10:10:42 +0200 |
| commit | c7b537bf0923df05254f9fa4722b298eb8f4790d (patch) | |
| tree | 68ad1fc460652d6f4aeafd58765e8e054be2c1df /llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp | |
| parent | 5577493734524e2b113d08aefa72314cf2bf0eb7 (diff) | |
| download | llvm-c7b537bf0923df05254f9fa4722b298eb8f4790d.zip llvm-c7b537bf0923df05254f9fa4722b298eb8f4790d.tar.gz llvm-c7b537bf0923df05254f9fa4722b298eb8f4790d.tar.bz2 | |
[AArch64] Add more efficient vector bitcast for v16i8
We previously split the vector into two halves and performed two vector reduce operations followed by bit shifting and bitwise or. Now, we use NEON's zip1 to concatenate
the halves in a smart way and then perform only a single vector reduce. This boosts performance quite a bit for this small routine, as vector reduce is a rather expensive
intruction. Original discussion for this started in: https://reviews.llvm.org/D145301
Differential Revision: https://reviews.llvm.org/D156544
Diffstat (limited to 'llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp')
0 files changed, 0 insertions, 0 deletions