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| author | Nikita Popov <npopov@redhat.com> | 2023-11-21 15:44:56 +0100 |
|---|---|---|
| committer | Nikita Popov <npopov@redhat.com> | 2023-11-21 15:47:55 +0100 |
| commit | ac75171d41f0000d53eadf64a943d6fabc24af6c (patch) | |
| tree | 1b5dba261487c17bef295bca691b664902588baa /llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp | |
| parent | a1652fdb5ebf4a7d94d28200765232ebc2ba7c62 (diff) | |
| download | llvm-ac75171d41f0000d53eadf64a943d6fabc24af6c.zip llvm-ac75171d41f0000d53eadf64a943d6fabc24af6c.tar.gz llvm-ac75171d41f0000d53eadf64a943d6fabc24af6c.tar.bz2 | |
[InstCombine] Fix incorrect nneg inference on shift amount
Whether this is valid depends on the bit widths of the involved
integers.
Fixes https://github.com/llvm/llvm-project/issues/72927.
Diffstat (limited to 'llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp')
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp index 1b2615d4..d2c6ffe 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp @@ -1223,7 +1223,9 @@ Instruction *InstCombinerImpl::visitZExt(ZExtInst &Zext) { if (!Zext.hasNonNeg()) { // If this zero extend is only used by a shift, add nneg flag. - if (Zext.hasOneUse() && SrcTy->getScalarSizeInBits() > 2 && + if (Zext.hasOneUse() && + SrcTy->getScalarSizeInBits() > + Log2_64_Ceil(DestTy->getScalarSizeInBits()) && match(Zext.user_back(), m_Shift(m_Value(), m_Specific(&Zext)))) { Zext.setNonNeg(); return &Zext; |