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| author | Phoebe Wang <phoebe.wang@intel.com> | 2023-09-07 20:33:31 +0800 |
|---|---|---|
| committer | Phoebe Wang <phoebe.wang@intel.com> | 2023-09-07 21:38:35 +0800 |
| commit | 7dd48cc24de2d54d40527432cbee8a9d97a8a4f7 (patch) | |
| tree | d948e491dc2b58222d4a6f760161828d0f20d6b8 /llvm/lib/TextAPI/TextStubCommon.cpp | |
| parent | 41518597705c558409725d4ba2d3c1af9110ca0d (diff) | |
| download | llvm-7dd48cc24de2d54d40527432cbee8a9d97a8a4f7.zip llvm-7dd48cc24de2d54d40527432cbee8a9d97a8a4f7.tar.gz llvm-7dd48cc24de2d54d40527432cbee8a9d97a8a4f7.tar.bz2 | |
[X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features
This is an alternative of D157485 and a pre-feature to support AVX10.
AVX10 Architecture Specification: https://cdrdv2.intel.com/v1/dl/getContent/784267
AVX10 Technical Paper: https://cdrdv2.intel.com/v1/dl/getContent/784343
RFC: https://discourse.llvm.org/t/rfc-design-for-avx10-feature-support/72661
Based on the feedbacks from LLVM and GCC community, we have agreed to
start from supporting `-m[no-]evex512` on existing AVX512 features.
The option `-mno-evex512` can be used with `-mavx512xxx` to build
binaries that can run on both legacy AVX512 targets and AVX10-256.
There're still arguments about what's the expected behavior when this
option as well as `-mavx512xxx` used together with `-mavx10.1-256`. We
decided to defer the support of `-mavx10.1` after we made consensus.
Or furthermore, we start from supporting AVX10.2 and not providing any
AVX10.1 options.
Reviewed By: RKSimon, skan
Differential Revision: https://reviews.llvm.org/D159250
Diffstat (limited to 'llvm/lib/TextAPI/TextStubCommon.cpp')
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