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author | Manolis Tsamis <manolis.tsamis@vrull.eu> | 2023-02-13 14:07:45 +0100 |
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committer | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2023-02-17 19:45:22 +0100 |
commit | d2918544a7fc4b5443879fe12f32a712e6dfe325 (patch) | |
tree | 72e5c6e819ed970bb2517b788634733b5c4f2ae0 /llvm/lib/TextAPI/InterfaceFile.cpp | |
parent | 21a543656cf4840023078359a6c7e0db7d5391b2 (diff) | |
download | llvm-d2918544a7fc4b5443879fe12f32a712e6dfe325.zip llvm-d2918544a7fc4b5443879fe12f32a712e6dfe325.tar.gz llvm-d2918544a7fc4b5443879fe12f32a712e6dfe325.tar.bz2 |
[RISCV] Add vendor-defined XTheadMemPair (two-GPR Memory Operations) extension
The vendor-defined XTHeadMemPair (no comparable standard extension exists
at the time of writing) extension adds two-GPR load/store pair instructions.
It is supported by the C9xx cores (e.g., found in the wild in the
Allwinner D1) by Alibaba T-Head.
The current (as of this commit) public documentation for this
extension is available at:
https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.2.2/xthead-2023-01-30-2.2.2.pdf
Support for these instructions has already landed in GNU Binutils:
https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=6e17ae625570ff8f3c12c8765b8d45d4db8694bd
Depends on D143847
Differential Revision: https://reviews.llvm.org/D144002
Diffstat (limited to 'llvm/lib/TextAPI/InterfaceFile.cpp')
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