aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/X86/X86TargetMachine.cpp
diff options
context:
space:
mode:
authorNadav Rotem <nrotem@apple.com>2013-01-05 05:42:48 +0000
committerNadav Rotem <nrotem@apple.com>2013-01-05 05:42:48 +0000
commit478b6a47ec9a1aa04d2a4f74831c312197ba6063 (patch)
treea11b99ca8b9a545a08ef1388b4d92fe3a3a2e29b /llvm/lib/Target/X86/X86TargetMachine.cpp
parentc1520bbb3422ef0efa4df4317720f5e6f7715861 (diff)
downloadllvm-478b6a47ec9a1aa04d2a4f74831c312197ba6063.zip
llvm-478b6a47ec9a1aa04d2a4f74831c312197ba6063.tar.gz
llvm-478b6a47ec9a1aa04d2a4f74831c312197ba6063.tar.bz2
Revert revision 171524. Original message:
URL: http://llvm.org/viewvc/llvm-project?rev=171524&view=rev Log: The current Intel Atom microarchitecture has a feature whereby when a function returns early then it is slightly faster to execute a sequence of NOP instructions to wait until the return address is ready, as opposed to simply stalling on the ret instruction until the return address is ready. When compiling for X86 Atom only, this patch will run a pass, called "X86PadShortFunction" which will add NOP instructions where less than four cycles elapse between function entry and return. It includes tests. Patch by Andy Zhang. llvm-svn: 171603
Diffstat (limited to 'llvm/lib/Target/X86/X86TargetMachine.cpp')
-rw-r--r--llvm/lib/Target/X86/X86TargetMachine.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 8393f7e..ea99796 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -190,10 +190,6 @@ bool X86PassConfig::addPreEmitPass() {
addPass(createX86IssueVZeroUpperPass());
ShouldPrint = true;
}
- if (getX86Subtarget().padShortFunctions()){
- addPass(createX86PadShortFunctions());
- ShouldPrint = true;
- }
return ShouldPrint;
}