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| author | David Woodhouse <dwmw2@infradead.org> | 2014-01-08 12:58:24 +0000 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2014-01-08 12:58:24 +0000 |
| commit | 32da3c8f3be5fd98f433342415662ca982da2e69 (patch) | |
| tree | 6122ddfba4d7f65afced53e1bf10402e70e69f34 /llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h | |
| parent | 374243a2902087ef4b08387b5597195737f31bc4 (diff) | |
| download | llvm-32da3c8f3be5fd98f433342415662ca982da2e69.zip llvm-32da3c8f3be5fd98f433342415662ca982da2e69.tar.gz llvm-32da3c8f3be5fd98f433342415662ca982da2e69.tar.bz2 | |
[x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand
It seems there is no separate instruction class for having AdSize *and*
OpSize bits set, which is required in order to disambiguate between all
these instructions. So add that to the disassembler.
Hm, perhaps we do need an AdSize16 bit after all?
llvm-svn: 198759
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h')
| -rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h index 1acaef1..954a3d7 100644 --- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h +++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h @@ -92,6 +92,8 @@ enum attributeBits { "operands change width") \ ENUM_ENTRY(IC_ADSIZE, 3, "requires an ADSIZE prefix, so " \ "operands change width") \ + ENUM_ENTRY(IC_OPSIZE_ADSIZE, 3, "requires both OPSIZE and ADSIZE " \ + "prefixes") \ ENUM_ENTRY(IC_XD, 2, "may say something about the opcode " \ "but not the operands") \ ENUM_ENTRY(IC_XS, 2, "may say something about the opcode " \ |