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author | Benjamin Kramer <benny.kra@googlemail.com> | 2010-10-23 09:10:44 +0000 |
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committer | Benjamin Kramer <benny.kra@googlemail.com> | 2010-10-23 09:10:44 +0000 |
commit | de0a4fbf3b8c6949d6cb0bf0e191736a3c5c2ab7 (patch) | |
tree | d3ad99c0bb76d3468096dc666eb97359e5fc2829 /llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | |
parent | aa19ee17c09874a7c8dbc548b94aa1d0d6aeb453 (diff) | |
download | llvm-de0a4fbf3b8c6949d6cb0bf0e191736a3c5c2ab7.zip llvm-de0a4fbf3b8c6949d6cb0bf0e191736a3c5c2ab7.tar.gz llvm-de0a4fbf3b8c6949d6cb0bf0e191736a3c5c2ab7.tar.bz2 |
Make the disassembler tables const so they end up in read-only memory.
llvm-svn: 117206
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp')
-rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp index 09f1584..691e2d7 100644 --- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -157,9 +157,8 @@ static void translateRegister(MCInst &mcInst, Reg reg) { /// @param immediate - The immediate value to append. /// @param operand - The operand, as stored in the descriptor table. /// @param insn - The internal instruction. -static void translateImmediate(MCInst &mcInst, - uint64_t immediate, - OperandSpecifier &operand, +static void translateImmediate(MCInst &mcInst, uint64_t immediate, + const OperandSpecifier &operand, InternalInstruction &insn) { // Sign-extend the immediate if necessary. @@ -392,9 +391,8 @@ static bool translateRMMemory(MCInst &mcInst, InternalInstruction &insn) { /// @param insn - The instruction to extract Mod, R/M, and SIB fields /// from. /// @return - 0 on success; nonzero otherwise -static bool translateRM(MCInst &mcInst, - OperandSpecifier &operand, - InternalInstruction &insn) { +static bool translateRM(MCInst &mcInst, const OperandSpecifier &operand, + InternalInstruction &insn) { switch (operand.type) { default: debug("Unexpected type for a R/M operand"); @@ -461,9 +459,8 @@ static bool translateFPRegister(MCInst &mcInst, /// @param operand - The operand, as stored in the descriptor table. /// @param insn - The internal instruction. /// @return - false on success; true otherwise. -static bool translateOperand(MCInst &mcInst, - OperandSpecifier &operand, - InternalInstruction &insn) { +static bool translateOperand(MCInst &mcInst, const OperandSpecifier &operand, + InternalInstruction &insn) { switch (operand.encoding) { default: debug("Unhandled operand encoding during translation"); |