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| author | Shengchen Kan <shengchen.kan@intel.com> | 2023-12-28 21:22:03 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-12-28 21:22:03 +0800 |
| commit | d79ccee8dc4aea52c146b10603f2a38646ad22fe (patch) | |
| tree | 58004bb5bf8aacc3d9ca3d26641bfa564d4d62fe /llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | |
| parent | 50965010821f70536136c121384b9cf5b47ced88 (diff) | |
| download | llvm-d79ccee8dc4aea52c146b10603f2a38646ad22fe.zip llvm-d79ccee8dc4aea52c146b10603f2a38646ad22fe.tar.gz llvm-d79ccee8dc4aea52c146b10603f2a38646ad22fe.tar.bz2 | |
[X86][MC] Support encoding/decoding for APX variant ADD/SUB/ADC/SBB/OR/XOR/NEG/NOT instructions (#76319)
Four variants: promoted legacy, ND (new data destination), NF (no flags
update) and NF_ND (NF + ND).
The syntax of NF instructions is aligned with GNU binutils.
https://sourceware.org/pipermail/binutils/2023-September/129545.html
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp index 59e2008..347dc0d 100644 --- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -1169,7 +1169,11 @@ static int getInstructionID(struct InternalInstruction *insn, attrMask |= ATTR_EVEXKZ; if (bFromEVEX4of4(insn->vectorExtensionPrefix[3])) attrMask |= ATTR_EVEXB; - if (aaaFromEVEX4of4(insn->vectorExtensionPrefix[3])) + // nf bit is the MSB of aaa + if (nfFromEVEX4of4(insn->vectorExtensionPrefix[3]) && + insn->opcodeType == MAP4) + attrMask |= ATTR_EVEXNF; + else if (aaaFromEVEX4of4(insn->vectorExtensionPrefix[3])) attrMask |= ATTR_EVEXK; if (lFromEVEX4of4(insn->vectorExtensionPrefix[3])) attrMask |= ATTR_VEXL; |