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authorPhoebe Wang <phoebe.wang@intel.com>2024-11-01 16:45:03 +0800
committerGitHub <noreply@github.com>2024-11-01 16:45:03 +0800
commitc72a751dabff4260dcc309e48008941d51b31d21 (patch)
treeb742b451e5a11bb9eb14b32debb95005487d59d8 /llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
parent1e19f0f9d92b5e9c43d53893e387341835d3d96b (diff)
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[X86][AMX] Support AMX-TRANSPOSE (#113532)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp')
-rw-r--r--llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
index ee1c814..f198234 100644
--- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -806,6 +806,10 @@ static int readModRM(struct InternalInstruction *insn) {
if (index > 7) \
*valid = 0; \
return prefix##_TMM0 + index; \
+ case TYPE_TMM_PAIR: \
+ if (index > 7) \
+ *valid = 0; \
+ return prefix##_TMM0_TMM1 + (index / 2); \
case TYPE_VK: \
index &= 0xf; \
if (index > 7) \
@@ -2315,6 +2319,7 @@ static bool translateRM(MCInst &mcInst, const OperandSpecifier &operand,
case TYPE_YMM:
case TYPE_ZMM:
case TYPE_TMM:
+ case TYPE_TMM_PAIR:
case TYPE_VK_PAIR:
case TYPE_VK:
case TYPE_DEBUGREG: