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| author | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-13 10:28:46 +0000 |
|---|---|---|
| committer | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-13 10:28:46 +0000 |
| commit | c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23 (patch) | |
| tree | 94dc79d894cf6e87f33787cba82f5a731a3a96be /llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | |
| parent | a7b142603da5ae63232b727bb20b997cadbaf4bb (diff) | |
| download | llvm-c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23.zip llvm-c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23.tar.gz llvm-c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23.tar.bz2 | |
Reverting r237234, "Use std::bitset for SubtargetFeatures"
The buildbots are still not satisfied.
MIPS and ARM are failing (even though at least MIPS was expected to pass).
llvm-svn: 237245
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp index 46a6b3c..e8c5475 100644 --- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -80,19 +80,20 @@ X86GenericDisassembler::X86GenericDisassembler( MCContext &Ctx, std::unique_ptr<const MCInstrInfo> MII) : MCDisassembler(STI, Ctx), MII(std::move(MII)) { - const FeatureBitset &FB = STI.getFeatureBits(); - if (FB[X86::Mode16Bit]) { + switch (STI.getFeatureBits() & + (X86::Mode16Bit | X86::Mode32Bit | X86::Mode64Bit)) { + case X86::Mode16Bit: fMode = MODE_16BIT; - return; - } else if (FB[X86::Mode32Bit]) { + break; + case X86::Mode32Bit: fMode = MODE_32BIT; - return; - } else if (FB[X86::Mode64Bit]) { + break; + case X86::Mode64Bit: fMode = MODE_64BIT; - return; + break; + default: + llvm_unreachable("Invalid CPU mode"); } - - llvm_unreachable("Invalid CPU mode"); } struct Region { |