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author | Maksim Panchenko <maks@fb.com> | 2022-05-19 13:23:40 -0700 |
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committer | Maksim Panchenko <maks@fb.com> | 2022-05-25 13:44:32 -0700 |
commit | bed9efed71b954047aa11d5ed02af433dd9971cf (patch) | |
tree | 0ce7a2d9e92c6ed9c3f33944d176b281e61d1129 /llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | |
parent | e51a6b7374ca2d11e07375843bf24ef51307308a (diff) | |
download | llvm-bed9efed71b954047aa11d5ed02af433dd9971cf.zip llvm-bed9efed71b954047aa11d5ed02af433dd9971cf.tar.gz llvm-bed9efed71b954047aa11d5ed02af433dd9971cf.tar.bz2 |
[MCDisassembler] Disambiguate Size parameter in tryAddingSymbolicOperand()
MCSymbolizer::tryAddingSymbolicOperand() overloaded the Size parameter
to specify either the instruction size or the operand size depending on
the architecture. However, for proper symbolic disassembly on X86, we
need to know both sizes, as an instruction can have two operands, and
the instruction size cannot be reliably calculated based on the operand
offset and its size. Hence, split Size into OpSize and InstSize.
For X86, the new interface allows to fix a couple of issues:
* Correctly adjust the value of PC-relative operands.
* Set operand size to zero when the operand is specified implicitly.
Differential Revision: https://reviews.llvm.org/D126101
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp')
-rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp index 8ca5c48..e8b9ee6 100644 --- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -1874,8 +1874,7 @@ static void translateImmediate(MCInst &mcInst, uint64_t immediate, uint64_t pcrel = 0; if (type == TYPE_REL) { isBranch = true; - pcrel = insn.startLocation + - insn.immediateOffset + insn.immediateSize; + pcrel = insn.startLocation + insn.length; switch (operand.encoding) { default: break; @@ -1950,9 +1949,9 @@ static void translateImmediate(MCInst &mcInst, uint64_t immediate, break; } - if (!Dis->tryAddingSymbolicOperand(mcInst, immediate + pcrel, - insn.startLocation, isBranch, - insn.immediateOffset, insn.immediateSize)) + if (!Dis->tryAddingSymbolicOperand( + mcInst, immediate + pcrel, insn.startLocation, isBranch, + insn.immediateOffset, insn.immediateSize, insn.length)) mcInst.addOperand(MCOperand::createImm(immediate)); if (type == TYPE_MOFFS) { @@ -2089,8 +2088,7 @@ static bool translateRMMemory(MCInst &mcInst, InternalInstruction &insn, return true; } if (insn.mode == MODE_64BIT){ - pcrel = insn.startLocation + - insn.displacementOffset + insn.displacementSize; + pcrel = insn.startLocation + insn.length; Dis->tryAddingPcLoadReferenceComment(insn.displacement + pcrel, insn.startLocation + insn.displacementOffset); @@ -2153,9 +2151,13 @@ static bool translateRMMemory(MCInst &mcInst, InternalInstruction &insn, mcInst.addOperand(baseReg); mcInst.addOperand(scaleAmount); mcInst.addOperand(indexReg); + + const uint8_t dispSize = + (insn.eaDisplacement == EA_DISP_NONE) ? 0 : insn.displacementSize; + if (!Dis->tryAddingSymbolicOperand( mcInst, insn.displacement + pcrel, insn.startLocation, false, - insn.displacementOffset, insn.displacementSize)) + insn.displacementOffset, dispSize, insn.length)) mcInst.addOperand(displacement); mcInst.addOperand(segmentReg); return false; |