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authorMaksim Panchenko <maks@fb.com>2022-05-31 14:50:19 -0700
committerMaksim Panchenko <maks@fb.com>2022-06-13 00:14:43 -0700
commit8f6512fea000c3a0d394864bb94e524bee375069 (patch)
tree8f1188e09f5200b1cbb1f4f2df63953d3abd5c7e /llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
parentb1c300fe6849a053482d117c7d3fa425da9a7430 (diff)
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[X86][Disassembler] Fix displacement operand size for symbolizer
On 64-bit X86, 0x66 operand-size override prefix will change the size of the instruction operand, e.g. from 32 bits to 16 bits, but it will not modify the size of the displacement operand used for memory addressing, which will always be 32 bits. Reviewed By: skan, rafauler Differential Revision: https://reviews.llvm.org/D126726
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp')
-rw-r--r--llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
index e8b9ee6..1da6bf8 100644
--- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -493,16 +493,15 @@ static int readPrefixes(struct InternalInstruction *insn) {
insn->displacementSize = (insn->hasAdSize ? 2 : 4);
insn->immediateSize = (insn->hasOpSize ? 2 : 4);
} else if (insn->mode == MODE_64BIT) {
+ insn->displacementSize = 4;
if (insn->rexPrefix && wFromREX(insn->rexPrefix)) {
insn->registerSize = 8;
insn->addressSize = (insn->hasAdSize ? 4 : 8);
- insn->displacementSize = 4;
insn->immediateSize = 4;
insn->hasOpSize = false;
} else {
insn->registerSize = (insn->hasOpSize ? 2 : 4);
insn->addressSize = (insn->hasAdSize ? 4 : 8);
- insn->displacementSize = (insn->hasOpSize ? 2 : 4);
insn->immediateSize = (insn->hasOpSize ? 2 : 4);
}
}