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| author | Craig Topper <craig.topper@gmail.com> | 2017-01-16 05:44:25 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2017-01-16 05:44:25 +0000 |
| commit | 33ac06413734b65c4e7cdc54c31f95e67cbafc13 (patch) | |
| tree | 08fc96e1236744677e27be8d33d9b8fdd2dd4c46 /llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | |
| parent | 7303370dc0c836c994c3b58941c04c2cd730cd69 (diff) | |
| download | llvm-33ac06413734b65c4e7cdc54c31f95e67cbafc13.zip llvm-33ac06413734b65c4e7cdc54c31f95e67cbafc13.tar.gz llvm-33ac06413734b65c4e7cdc54c31f95e67cbafc13.tar.bz2 | |
[AVX-512] Begin giving the disassembler a way to recognize that VSIB is a different encoding than regular addressing modes.
This part first teaches it not to check error if EVEX.V2 is used by a VSIB instruction.
llvm-svn: 292093
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp index 0871888..9184994 100644 --- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -992,6 +992,7 @@ static bool translateOperand(MCInst &mcInst, const OperandSpecifier &operand, case ENCODING_WRITEMASK: return translateMaskRegister(mcInst, insn.writemask); CASE_ENCODING_RM: + CASE_ENCODING_VSIB: return translateRM(mcInst, operand, insn, Dis); case ENCODING_IB: case ENCODING_IW: |