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| author | Phoebe Wang <phoebe.wang@intel.com> | 2024-08-03 09:26:07 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-03 09:26:07 +0800 |
| commit | 259ca9ee9c4d9f7ba2d05db9fe05f782a865aeb5 (patch) | |
| tree | efe54e427f4b2f5ad8f683adf0cc5a59118088aa /llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | |
| parent | a43677c17266308fb615cc37d03dcff87e7e9a5f (diff) | |
| download | llvm-259ca9ee9c4d9f7ba2d05db9fe05f782a865aeb5.zip llvm-259ca9ee9c4d9f7ba2d05db9fe05f782a865aeb5.tar.gz llvm-259ca9ee9c4d9f7ba2d05db9fe05f782a865aeb5.tar.bz2 | |
Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (#101616)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Diffstat (limited to 'llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp index 6272e2d..7324fde 100644 --- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -377,7 +377,7 @@ static int readPrefixes(struct InternalInstruction *insn) { // We simulate the REX2 prefix for simplicity's sake insn->rex2ExtensionPrefix[1] = (r2FromEVEX2of4(insn->vectorExtensionPrefix[1]) << 6) | - (x2FromEVEX3of4(insn->vectorExtensionPrefix[2]) << 5) | + (uFromEVEX3of4(insn->vectorExtensionPrefix[2]) << 5) | (b2FromEVEX2of4(insn->vectorExtensionPrefix[1]) << 4); } @@ -1217,8 +1217,6 @@ static int getInstructionID(struct InternalInstruction *insn, if (zFromEVEX4of4(insn->vectorExtensionPrefix[3])) attrMask |= ATTR_EVEXKZ; - if (bFromEVEX4of4(insn->vectorExtensionPrefix[3])) - attrMask |= ATTR_EVEXB; if (isNF(insn) && !readModRM(insn) && !isCCMPOrCTEST(insn)) // NF bit is the MSB of aaa. attrMask |= ATTR_EVEXNF; @@ -1226,6 +1224,12 @@ static int getInstructionID(struct InternalInstruction *insn, else if (aaaFromEVEX4of4(insn->vectorExtensionPrefix[3]) && (insn->opcodeType != MAP4)) attrMask |= ATTR_EVEXK; + if (bFromEVEX4of4(insn->vectorExtensionPrefix[3])) { + attrMask |= ATTR_EVEXB; + if (uFromEVEX3of4(insn->vectorExtensionPrefix[2]) && !readModRM(insn) && + modFromModRM(insn->modRM) == 3) + attrMask |= ATTR_EVEXU; + } if (lFromEVEX4of4(insn->vectorExtensionPrefix[3])) attrMask |= ATTR_VEXL; if (l2FromEVEX4of4(insn->vectorExtensionPrefix[3])) |