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author | Thomas Lively <tlively@google.com> | 2019-02-28 18:39:08 +0000 |
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committer | Thomas Lively <tlively@google.com> | 2019-02-28 18:39:08 +0000 |
commit | f3b4f99007cdcb3306484c9a39d31addc20aaa69 (patch) | |
tree | 266810d9e4cefb97f3687f7d18726680e95e4e21 /llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | |
parent | 9915b1fa4aa520c4e4d73f0707fc743c4dc08933 (diff) | |
download | llvm-f3b4f99007cdcb3306484c9a39d31addc20aaa69.zip llvm-f3b4f99007cdcb3306484c9a39d31addc20aaa69.tar.gz llvm-f3b4f99007cdcb3306484c9a39d31addc20aaa69.tar.bz2 |
[WebAssembly] Remove uses of ThreadModel
Summary:
In the clang UI, replaces -mthread-model posix with -matomics as the
source of truth on threading. In the backend, replaces
-thread-model=posix with the atomics target feature, which is now
collected on the WebAssemblyTargetMachine along with all other used
features. These collected features will also be used to emit the
target features section in the future.
The default configuration for the backend is thread-model=posix and no
atomics, which was previously an invalid configuration. This change
makes the default valid because the thread model is ignored.
A side effect of this change is that objects are never emitted with
passive segments. It will instead be up to the linker to decide
whether sections should be active or passive based on whether atomics
are used in the final link.
Reviewers: aheejin, sbc100, dschuff
Subscribers: mehdi_amini, jgravelle-google, hiraditya, sunfish, steven_wu, dexonsmith, rupprecht, jfb, jdoerfert, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D58742
llvm-svn: 355112
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | 41 |
1 files changed, 27 insertions, 14 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp index 8e8b487..768ab7a 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp @@ -115,6 +115,10 @@ WebAssemblyTargetMachine::WebAssemblyTargetMachine( initAsmInfo(); + // Create a subtarget using the unmodified target machine features to + // initialize the used feature set with explicitly enabled features. + getSubtargetImpl(getTargetCPU(), getTargetFeatureString()); + // Note that we don't use setRequiresStructuredCFG(true). It disables // optimizations than we're ok with, and want, such as critical edge // splitting and tail merging. @@ -123,6 +127,17 @@ WebAssemblyTargetMachine::WebAssemblyTargetMachine( WebAssemblyTargetMachine::~WebAssemblyTargetMachine() = default; // anchor. const WebAssemblySubtarget * +WebAssemblyTargetMachine::getSubtargetImpl(std::string CPU, + std::string FS) const { + auto &I = SubtargetMap[CPU + FS]; + if (!I) { + I = llvm::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this); + UsedFeatures |= I->getFeatureBits(); + } + return I.get(); +} + +const WebAssemblySubtarget * WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const { Attribute CPUAttr = F.getFnAttribute("target-cpu"); Attribute FSAttr = F.getFnAttribute("target-features"); @@ -134,15 +149,12 @@ WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const { ? FSAttr.getValueAsString().str() : TargetFS; - auto &I = SubtargetMap[CPU + FS]; - if (!I) { - // This needs to be done before we create a new subtarget since any - // creation will depend on the TM and the code generation flags on the - // function that reside in TargetOptions. - resetTargetOptions(F); - I = llvm::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this); - } - return I.get(); + // This needs to be done before we create a new subtarget since any + // creation will depend on the TM and the code generation flags on the + // function that reside in TargetOptions. + resetTargetOptions(F); + + return getSubtargetImpl(CPU, FS); } namespace { @@ -202,14 +214,15 @@ FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) { //===----------------------------------------------------------------------===// void WebAssemblyPassConfig::addIRPasses() { - if (TM->Options.ThreadModel == ThreadModel::Single) { - // In "single" mode, atomics get lowered to non-atomics. - addPass(createLowerAtomicPass()); - addPass(new StripThreadLocal()); - } else { + if (static_cast<WebAssemblyTargetMachine *>(TM) + ->getUsedFeatures()[WebAssembly::FeatureAtomics]) { // Expand some atomic operations. WebAssemblyTargetLowering has hooks which // control specifically what gets lowered. addPass(createAtomicExpandPass()); + } else { + // If atomics are not enabled, they get lowered to non-atomics. + addPass(createLowerAtomicPass()); + addPass(new StripThreadLocal()); } // Add signatures to prototype-less function declarations |