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| author | sstwcw <f0gukp2nk@protonmail.com> | 2023-02-06 00:57:03 +0000 |
|---|---|---|
| committer | sstwcw <f0gukp2nk@protonmail.com> | 2023-02-06 00:58:11 +0000 |
| commit | cad708b9a1ecbf5645706056bb7c4fc0ea4721b6 (patch) | |
| tree | 9225a6f7d8fb6d663cedfc8b6d693cedde934191 /llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | |
| parent | 26182dfa3600f33995c20214a226eb482331fb01 (diff) | |
| download | llvm-cad708b9a1ecbf5645706056bb7c4fc0ea4721b6.zip llvm-cad708b9a1ecbf5645706056bb7c4fc0ea4721b6.tar.gz llvm-cad708b9a1ecbf5645706056bb7c4fc0ea4721b6.tar.bz2 | |
[clang-format] Recognize Verilog non-blocking assignment
Reviewed By: HazardyKnusperkeks, owenpan
Differential Revision: https://reviews.llvm.org/D142891
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp')
0 files changed, 0 insertions, 0 deletions