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| author | paperchalice <liujunchang97@outlook.com> | 2024-06-04 08:10:58 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-04 08:10:58 +0800 |
| commit | 7652a59407018c057cdc1163c9f64b5b6f0954eb (patch) | |
| tree | 34a730f64f9710e3043df8e967120cac8ad79d6d /llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | |
| parent | 0ea1271ee13c8c3d765904dba16dd27b91584d66 (diff) | |
| download | llvm-7652a59407018c057cdc1163c9f64b5b6f0954eb.zip llvm-7652a59407018c057cdc1163c9f64b5b6f0954eb.tar.gz llvm-7652a59407018c057cdc1163c9f64b5b6f0954eb.tar.bz2 | |
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
- Fix build with `EXPENSIVE_CHECKS`
- Remove unused `PassName::ID` to resolve warning
- Mark `~SelectionDAGISel` virtual so AArch64 backend can work properly
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp index fd92a35..23539a5 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp @@ -90,7 +90,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget() { initializeWebAssemblyMCLowerPrePassPass(PR); initializeWebAssemblyLowerRefTypesIntPtrConvPass(PR); initializeWebAssemblyFixBrTableDefaultsPass(PR); - initializeWebAssemblyDAGToDAGISelPass(PR); + initializeWebAssemblyDAGToDAGISelLegacyPass(PR); } //===----------------------------------------------------------------------===// |