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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-28 10:26:52 -0500 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-02-04 22:29:23 -0500 |
| commit | 9260d01faa664d557feeeec8df2f5c7561bb4a95 (patch) | |
| tree | 978b90fa760158d0227ae1d3bb61ee7fa27b8c2e /llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp | |
| parent | ec50e10db437d935a3faee0d72fd5b80d49682ab (diff) | |
| download | llvm-9260d01faa664d557feeeec8df2f5c7561bb4a95.zip llvm-9260d01faa664d557feeeec8df2f5c7561bb4a95.tar.gz llvm-9260d01faa664d557feeeec8df2f5c7561bb4a95.tar.bz2 | |
AMDGPU: Correct memory size for image intrinsics
This was incorrectly rounding up to the next power of 2. v4f32 was
rounding up to v8f32, which was just wrong. There are also v3i16/v3f16
available in MVT, so we don't even need to round the f16 cases
anymore. Additionally, this field is really an EVT so we don't even
need to consider this.
Also switch some asserts to return invalid. We should have an IR
verifier for these intrinsic return types, but for now it's better to
not assert on IR that passes the verifier.
This should also probably be fixed to consider that dmask is really
eliminating some of the loaded components.
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp')
0 files changed, 0 insertions, 0 deletions