diff options
author | Shiva Chen <shiva0217@gmail.com> | 2018-05-09 02:42:00 +0000 |
---|---|---|
committer | Shiva Chen <shiva0217@gmail.com> | 2018-05-09 02:42:00 +0000 |
commit | 801bf7ebbed34577e730a53d6575035c26e39ac1 (patch) | |
tree | 841dab1f5e44ee7126122575dc501d8cf127136f /llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp | |
parent | 667fbe2cb012f7b231b07379a2c9fc2358c393f0 (diff) | |
download | llvm-801bf7ebbed34577e730a53d6575035c26e39ac1.zip llvm-801bf7ebbed34577e730a53d6575035c26e39ac1.tar.gz llvm-801bf7ebbed34577e730a53d6575035c26e39ac1.tar.bz2 |
[DebugInfo] Examine all uses of isDebugValue() for debug instructions.
Because we create a new kind of debug instruction, DBG_LABEL, we need to
check all passes which use isDebugValue() to check MachineInstr is debug
instruction or not. When expelling debug instructions, we should expel
both DBG_VALUE and DBG_LABEL. So, I create a new function,
isDebugInstr(), in MachineInstr to check whether the MachineInstr is
debug instruction or not.
This patch has no new test case. I have run regression test and there is
no difference in regression test.
Differential Revision: https://reviews.llvm.org/D45342
Patch by Hsiangkai Wang.
llvm-svn: 331844
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp')
-rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp index 6780f25..c326bdb 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp @@ -163,7 +163,7 @@ static void Query(const MachineInstr &MI, AliasAnalysis &AA, bool &Read, assert(!MI.isPosition()); assert(!MI.isTerminator()); - if (MI.isDebugValue()) + if (MI.isDebugInstr()) return; // Check for loads. @@ -871,7 +871,7 @@ bool WebAssemblyRegStackify::runOnMachineFunction(MachineFunction &MF) { SmallVector<unsigned, 0> Stack; for (MachineBasicBlock &MBB : MF) { for (MachineInstr &MI : MBB) { - if (MI.isDebugValue()) + if (MI.isDebugInstr()) continue; for (MachineOperand &MO : reverse(MI.explicit_operands())) { if (!MO.isReg()) |