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| author | Wei Mi <wmi@google.com> | 2019-01-08 00:26:11 +0000 |
|---|---|---|
| committer | Wei Mi <wmi@google.com> | 2019-01-08 00:26:11 +0000 |
| commit | 2645fd0ece04a887807fc3c18f1ec7d70669e6e2 (patch) | |
| tree | 16ca57fc571bf7c4a1ff46c25d4b965ab9c83e4b /llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp | |
| parent | dea021bb775850c34e7d3a92dae594d1fff0de08 (diff) | |
| download | llvm-2645fd0ece04a887807fc3c18f1ec7d70669e6e2.zip llvm-2645fd0ece04a887807fc3c18f1ec7d70669e6e2.tar.gz llvm-2645fd0ece04a887807fc3c18f1ec7d70669e6e2.tar.bz2 | |
[RegisterCoalescer] dst register's live interval needs to be updated when
merging a src register in ToBeUpdated set.
This is to fix PR40061 related with https://reviews.llvm.org/rL339035.
In https://reviews.llvm.org/rL339035, live interval of source pseudo register
in rematerialized copy may be saved in ToBeUpdated set and its update may be
postponed.
In PR40061, %t2 = %t1 is rematerialized and %t1 is added into toBeUpdated set
to postpone its live interval update. After the rematerialization, the live
interval of %t1 is larger than necessary. Then %t1 is merged into %t3 and %t1
gets removed. After the merge, %t3 contains live interval larger than necessary.
Because %t3 is not in toBeUpdated set, its live interval is not updated after
register coalescing and it will break some assumption in regalloc.
The patch requires the live interval of destination register in a merge to be
updated if the source register is in ToBeUpdated.
Differential revision: https://reviews.llvm.org/D55867
llvm-svn: 350586
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp')
0 files changed, 0 insertions, 0 deletions