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| author | Derek Schuff <dschuff@google.com> | 2016-08-02 23:16:09 +0000 |
|---|---|---|
| committer | Derek Schuff <dschuff@google.com> | 2016-08-02 23:16:09 +0000 |
| commit | 39bf39f35c208109f6d5907708ee53dee2878bed (patch) | |
| tree | 92c88047132b9387bfac686662ba7d8a3b9e0abc /llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp | |
| parent | 02a1e973a80adce224cd950bb2b5b2c78622829a (diff) | |
| download | llvm-39bf39f35c208109f6d5907708ee53dee2878bed.zip llvm-39bf39f35c208109f6d5907708ee53dee2878bed.tar.gz llvm-39bf39f35c208109f6d5907708ee53dee2878bed.tar.bz2 | |
[WebAssembly] Initial SIMD128 support.
Kicks off the implementation of wasm SIMD128 support (spec:
https://github.com/stoklund/portable-simd/blob/master/portable-simd.md),
adding support for add, sub, mul for i8x16, i16x8, i32x4, and f32x4.
The spec is WIP, and might change in the near future.
Patch by João Porto
Differential Revision: https://reviews.llvm.org/D22686
llvm-svn: 277543
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp')
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp index 56d44e6..1c3c104 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp @@ -108,7 +108,8 @@ bool WebAssemblyPeephole::runOnMachineFunction(MachineFunction &MF) { MachineRegisterInfo &MRI = MF.getRegInfo(); WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>(); - const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo(); + const auto &Subtarget = MF.getSubtarget<WebAssemblySubtarget>(); + const auto &TII = *Subtarget.getInstrInfo(); const WebAssemblyTargetLowering &TLI = *MF.getSubtarget<WebAssemblySubtarget>().getTargetLowering(); auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(); @@ -186,6 +187,34 @@ bool WebAssemblyPeephole::runOnMachineFunction(MachineFunction &MF) { MI, MBB, MF, MFI, MRI, TII, WebAssembly::FALLTHROUGH_RETURN_F64, WebAssembly::COPY_LOCAL_F64); break; + case WebAssembly::RETURN_v16i8: + Changed |= + Subtarget.hasSIMD128() && + MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII, + WebAssembly::FALLTHROUGH_RETURN_v16i8, + WebAssembly::COPY_LOCAL_V128); + break; + case WebAssembly::RETURN_v8i16: + Changed |= + Subtarget.hasSIMD128() && + MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII, + WebAssembly::FALLTHROUGH_RETURN_v8i16, + WebAssembly::COPY_LOCAL_V128); + break; + case WebAssembly::RETURN_v4i32: + Changed |= + Subtarget.hasSIMD128() && + MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII, + WebAssembly::FALLTHROUGH_RETURN_v4i32, + WebAssembly::COPY_LOCAL_V128); + break; + case WebAssembly::RETURN_v4f32: + Changed |= + Subtarget.hasSIMD128() && + MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII, + WebAssembly::FALLTHROUGH_RETURN_v4f32, + WebAssembly::COPY_LOCAL_V128); + break; case WebAssembly::RETURN_VOID: if (!DisableWebAssemblyFallthroughReturnOpt && &MBB == &MF.back() && &MI == &MBB.back()) |