diff options
| author | Craig Topper <craig.topper@intel.com> | 2018-10-03 21:10:29 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-10-03 21:10:29 +0000 |
| commit | a65c2dbfd601c1c748ea2e7efd17ed9b2a656f9a (patch) | |
| tree | 4cae726d4ddc0e4b3e17b8fbf449b49ee4068160 /llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp | |
| parent | f8c4f4e6e73c618347df99e19ec5e8bd383cb906 (diff) | |
| download | llvm-a65c2dbfd601c1c748ea2e7efd17ed9b2a656f9a.zip llvm-a65c2dbfd601c1c748ea2e7efd17ed9b2a656f9a.tar.gz llvm-a65c2dbfd601c1c748ea2e7efd17ed9b2a656f9a.tar.bz2 | |
[X86] Stop promoting vector ISD::SELECT to vXi64.
The additional patterns needed for this aren't overwhelming and introducing extra bitcasts during lowering limits our ability to do computeNumSignBits. Not that I have a good example of that for select. I'm just becoming increasingly grumpy about promotion of AND/OR/XOR. SELECT was just a lot easier to fix.
llvm-svn: 343723
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp')
0 files changed, 0 insertions, 0 deletions