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authorDan Gohman <dan433584@gmail.com>2016-01-19 16:59:23 +0000
committerDan Gohman <dan433584@gmail.com>2016-01-19 16:59:23 +0000
commitb6fd39a3a779295dc7939fd4d79dde513fa73fbe (patch)
tree880a2aeee05182a9b07e4539eb845348734d5f08 /llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
parent1a7e8b4bc1cde3fea2de164c26bb499bfce3ad39 (diff)
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[WebAssembly] Rematerialize constants rather than hold them live in registers.
Teach the register stackifier to rematerialize constants that have multiple uses instead of leaving them in registers. In the WebAssembly encoding, it's the same code size to materialize most constants as it is to read a value from a register. llvm-svn: 258142
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp26
1 files changed, 20 insertions, 6 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
index 028e9af..37dd0c4 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
@@ -32,6 +32,21 @@ WebAssemblyInstrInfo::WebAssemblyInstrInfo(const WebAssemblySubtarget &STI)
WebAssembly::ADJCALLSTACKUP),
RI(STI.getTargetTriple()) {}
+bool WebAssemblyInstrInfo::isReallyTriviallyReMaterializable(
+ const MachineInstr *MI, AliasAnalysis *AA) const {
+ switch (MI->getOpcode()) {
+ case WebAssembly::CONST_I32:
+ case WebAssembly::CONST_I64:
+ case WebAssembly::CONST_F32:
+ case WebAssembly::CONST_F64:
+ // isReallyTriviallyReMaterializableGeneric misses these because of the
+ // ARGUMENTS implicit def, so we manualy override it here.
+ return true;
+ default:
+ return false;
+ }
+}
+
void WebAssemblyInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
DebugLoc DL, unsigned DestReg,
@@ -39,9 +54,10 @@ void WebAssemblyInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
// This method is called by post-RA expansion, which expects only pregs to
// exist. However we need to handle both here.
auto &MRI = MBB.getParent()->getRegInfo();
- const TargetRegisterClass *RC = TargetRegisterInfo::isVirtualRegister(DestReg) ?
- MRI.getRegClass(DestReg) :
- MRI.getTargetRegisterInfo()->getMinimalPhysRegClass(SrcReg);
+ const TargetRegisterClass *RC =
+ TargetRegisterInfo::isVirtualRegister(DestReg)
+ ? MRI.getRegClass(DestReg)
+ : MRI.getTargetRegisterInfo()->getMinimalPhysRegClass(SrcReg);
unsigned CopyLocalOpcode;
if (RC == &WebAssembly::I32RegClass)
@@ -145,9 +161,7 @@ unsigned WebAssemblyInstrInfo::InsertBranch(MachineBasicBlock &MBB,
assert(Cond.size() == 2 && "Expected a flag and a successor block");
if (Cond[0].getImm()) {
- BuildMI(&MBB, DL, get(WebAssembly::BR_IF))
- .addOperand(Cond[1])
- .addMBB(TBB);
+ BuildMI(&MBB, DL, get(WebAssembly::BR_IF)).addOperand(Cond[1]).addMBB(TBB);
} else {
BuildMI(&MBB, DL, get(WebAssembly::BR_UNLESS))
.addOperand(Cond[1])