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author | Derek Schuff <dschuff@google.com> | 2015-12-11 23:49:46 +0000 |
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committer | Derek Schuff <dschuff@google.com> | 2015-12-11 23:49:46 +0000 |
commit | 9769debf88170904006b4b16538085e5dbd2ed44 (patch) | |
tree | b316f68ef161411bf790cf6c5ba27b717873bae5 /llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | |
parent | e8f9387e0cae74b54a8e77310477626a59a91aed (diff) | |
download | llvm-9769debf88170904006b4b16538085e5dbd2ed44.zip llvm-9769debf88170904006b4b16538085e5dbd2ed44.tar.gz llvm-9769debf88170904006b4b16538085e5dbd2ed44.tar.bz2 |
[WebAssembly] Implement prolog/epilog insertion and FrameIndex elimination
Summary:
Use the SP32 physical register as the base for FrameIndex
lowering. Update it and the __stack_pointer global var in the prolog and
epilog. Extend the mapping of virtual registers to wasm locals to
include the physical registers.
Rather than modify the target-independent PrologEpilogInserter (which
asserts that there are no virtual registers left) include a
slightly-modified copy for Wasm that does not have this assertion and
only clears the virtual registers if scavenging was needed (which of
course it isn't for wasm).
Differential Revision: http://reviews.llvm.org/D15344
llvm-svn: 255392
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index 76df63b..a5ca08f 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -167,6 +167,8 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); setOperationAction(ISD::DYNAMIC_STACKALLOC, MVTPtr, Expand); + setOperationAction(ISD::FrameIndex, MVT::i32, Custom); + // Expand these forms; we pattern-match the forms that we can handle in isel. for (auto T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64}) for (auto Op : {ISD::BR_CC, ISD::SELECT_CC}) @@ -520,6 +522,8 @@ SDValue WebAssemblyTargetLowering::LowerOperation(SDValue Op, default: llvm_unreachable("unimplemented operation lowering"); return SDValue(); + case ISD::FrameIndex: + return LowerFrameIndex(Op, DAG); case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); case ISD::ExternalSymbol: @@ -533,6 +537,12 @@ SDValue WebAssemblyTargetLowering::LowerOperation(SDValue Op, } } +SDValue WebAssemblyTargetLowering::LowerFrameIndex(SDValue Op, + SelectionDAG &DAG) const { + int FI = cast<FrameIndexSDNode>(Op)->getIndex(); + return DAG.getTargetFrameIndex(FI, Op.getValueType()); +} + SDValue WebAssemblyTargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const { SDLoc DL(Op); |