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| author | Benjamin Maxwell <benjamin.maxwell@arm.com> | 2025-11-06 13:33:55 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-11-06 13:33:55 +0000 |
| commit | cbb9b0e08ed19b074ff594a1306c3ca3cb8b9913 (patch) | |
| tree | e2a7b5164c423a697c298a368d753a2e574fb854 /llvm/lib/Target/WebAssembly/WebAssemblyFixFunctionBitcasts.cpp | |
| parent | e974c65774414eceaf789e2464f56e39c9afc210 (diff) | |
| download | llvm-cbb9b0e08ed19b074ff594a1306c3ca3cb8b9913.zip llvm-cbb9b0e08ed19b074ff594a1306c3ca3cb8b9913.tar.gz llvm-cbb9b0e08ed19b074ff594a1306c3ca3cb8b9913.tar.bz2 | |
[AArch64] Lower v1i64 and v2i64 [S|U][MIN|MAX] to SVE when available (#166735)
The predicate is likely to be hoisted, so in a loop, this would result
in a single SVE instruction, which should have lower latency.
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyFixFunctionBitcasts.cpp')
0 files changed, 0 insertions, 0 deletions