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authorThurston Dang <thurston@google.com>2025-06-26 22:55:55 -0700
committerGitHub <noreply@github.com>2025-06-26 22:55:55 -0700
commitafe6af14ff9b790232efaf9f57667eba38eddfc9 (patch)
treead5d459d11a8f68d1542c6fe2b5dce9ae397b282 /llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
parent56b2c7d988750454f17beeadb360435dd770b67d (diff)
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[msan] Add optional flag to improve instrumentation of disjoint OR (#145990)
The disjoint OR (https://github.com/llvm/llvm-project/pull/72583) of two '1's is poison, hence the MSan ought to consider the result uninitialized (rather than initialized - i.e. a false negative - as per the existing instrumentation which ignores disjointedness). This patch adds a flag, `-msan-precise-disjoint-or`, which defaults to false (the legacy behavior). A future patch will default this flag to true. Updates the test from https://github.com/llvm/llvm-project/pull/145982
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