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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-06-15 15:30:06 +0100 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-06-15 15:30:24 +0100 |
| commit | ae33cbc49408c90cef0b1246a7bae59bd467c93b (patch) | |
| tree | d27b764a9d1ccf25d59af33bc1fc14788bf4bde5 /llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp | |
| parent | f47a7766287afa0919918093d8367316aa2c9e8e (diff) | |
| download | llvm-ae33cbc49408c90cef0b1246a7bae59bd467c93b.zip llvm-ae33cbc49408c90cef0b1246a7bae59bd467c93b.tar.gz llvm-ae33cbc49408c90cef0b1246a7bae59bd467c93b.tar.bz2 | |
[X86][SSE] LowerVectorAllZeroTest - add support for >256-bit vectors
Reduce by splitting the vector until we reach the target size for PTEST/MOVMSK_PCMPEQ. There might be some cases where AVX512 can perform this with 512-bit vectors but so far I haven't encountered any such pattern that reaches LowerVectorAllZeroTest.
Prep work for D81547
Diffstat (limited to 'llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions