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| author | Craig Topper <craig.topper@sifive.com> | 2021-04-22 15:10:47 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2021-04-22 15:18:15 -0700 |
| commit | 5185b52988c5874dd46b2cc17685b78cd64609c1 (patch) | |
| tree | a62b48ad5209e4443a7056b8f25d345b0c6de1e3 /llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp | |
| parent | 06234f758e1945084582cf80450b396f75a9c06e (diff) | |
| download | llvm-5185b52988c5874dd46b2cc17685b78cd64609c1.zip llvm-5185b52988c5874dd46b2cc17685b78cd64609c1.tar.gz llvm-5185b52988c5874dd46b2cc17685b78cd64609c1.tar.bz2 | |
[RISCV] Fix crash with fptosi.sat/fptoui.sat intrinsics on RV64. Add test cases.
Add PromoteIntOp_FP_TO_XINT_SAT to type legalize the bit width
operand from i32 to i64 for RV64.
Add test cases for the saturating intrinsics for half/float/double
and i32/i64. CodeGen is definitely not optimal. We can probably
make use of the native behavior of fcvt instructions in many cases.
Fixes PR50083
Diffstat (limited to 'llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions