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| author | James Chesterman <James.Chesterman@arm.com> | 2024-11-15 11:01:10 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-15 11:01:10 +0000 |
| commit | 4e1db6a318775d9d0c49357baea6ca02fe5b5389 (patch) | |
| tree | abe62a50c435d3a8059625ab6312142baf1bd276 /llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp | |
| parent | e9fc2faf0c2551eb4f9f932da09bdf1af24ac7e2 (diff) | |
| download | llvm-4e1db6a318775d9d0c49357baea6ca02fe5b5389.zip llvm-4e1db6a318775d9d0c49357baea6ca02fe5b5389.tar.gz llvm-4e1db6a318775d9d0c49357baea6ca02fe5b5389.tar.bz2 | |
[AArch64][SVE] Add AArch64ISD nodes for wide add instructions (#115895)
When lowering from a partial reduction to a pair of wide adds,
previously the corresponding intrinsics were returned as nodes. Now
there are AArch64ISD nodes that are returned.
Diffstat (limited to 'llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions