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| author | Craig Topper <craig.topper@intel.com> | 2018-08-21 19:17:00 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-08-21 19:17:00 +0000 |
| commit | 3d8fe39ca7360b8fcb3558cf5625ad7525933256 (patch) | |
| tree | 98bff46986602f4bf815912f748e294da21338b3 /llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp | |
| parent | 9583d4fa03e8010ba6f80302940b548084d8c477 (diff) | |
| download | llvm-3d8fe39ca7360b8fcb3558cf5625ad7525933256.zip llvm-3d8fe39ca7360b8fcb3558cf5625ad7525933256.tar.gz llvm-3d8fe39ca7360b8fcb3558cf5625ad7525933256.tar.bz2 | |
[InstCombine] Pull simple checks above a more complicated one. NFCI
I'm assuming its easier to make sure the RHS of an XOR is all ones than it is to check for the many select patterns we have. So lets check that first. Same with the one use check.
llvm-svn: 340321
Diffstat (limited to 'llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions