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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2024-11-15 14:50:52 +0100 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2024-11-15 14:52:29 +0100 |
| commit | 35710ab392b50c815765f03c12409147502dfb86 (patch) | |
| tree | e5963faec6e57bbdb822478792c1af03f709718a /llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp | |
| parent | 4b928608f8865689d51bf7c9646a049328b9ac62 (diff) | |
| download | llvm-35710ab392b50c815765f03c12409147502dfb86.zip llvm-35710ab392b50c815765f03c12409147502dfb86.tar.gz llvm-35710ab392b50c815765f03c12409147502dfb86.tar.bz2 | |
[SystemZ] Fix wrong register class for some DFP instructions
Certain DFP instructions have GPR arguments, which are currently
incorrectly treated as FPR registers. Since we do not use DFP
in codegen, this only affects the assembler and disassembler.
Diffstat (limited to 'llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions