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| author | Michael Liao <michael.hliao@gmail.com> | 2020-01-08 10:50:23 -0500 |
|---|---|---|
| committer | Michael Liao <michael.hliao@gmail.com> | 2020-01-14 19:26:15 -0500 |
| commit | 01a4b83154760ea286117ac4de9576b8a215cb8d (patch) | |
| tree | 68efc961854ebd364ba9a3df93b2f28cc94734f8 /llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp | |
| parent | 47c6ab2b97773ee5fb360fc093a5824be64b8c68 (diff) | |
| download | llvm-01a4b83154760ea286117ac4de9576b8a215cb8d.zip llvm-01a4b83154760ea286117ac4de9576b8a215cb8d.tar.gz llvm-01a4b83154760ea286117ac4de9576b8a215cb8d.tar.bz2 | |
[codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU.
Summary:
- `dead-mi-elimination` assumes MIR in the SSA form and cannot be
arranged after phi elimination or DeSSA. It's enhanced to handle the
dead register definition by skipping use check on it. Once a register
def is `dead`, all its uses, if any, should be `undef`.
- Re-arrange the DIE in RA phase for AMDGPU by placing it directly after
`detect-dead-lanes`.
- Many relevant tests are refined due to different register assignment.
Reviewers: rampitec, qcolombet, sunfish
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72709
Diffstat (limited to 'llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions