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| author | Krzysztof Parzyszek <kparzysz@quicinc.com> | 2022-12-03 11:06:12 -0600 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@quicinc.com> | 2022-12-03 12:08:47 -0600 |
| commit | 8c7c20f033c7036a8bf231ca6f9e02172cb581f0 (patch) | |
| tree | 5980d2a7545070fb3c37df39dbb563b98158a778 /llvm/lib/Target/Sparc/SparcTargetMachine.cpp | |
| parent | d98c17271265f54a5c6ad07b2094f9b5bf3a34cc (diff) | |
| download | llvm-8c7c20f033c7036a8bf231ca6f9e02172cb581f0.zip llvm-8c7c20f033c7036a8bf231ca6f9e02172cb581f0.tar.gz llvm-8c7c20f033c7036a8bf231ca6f9e02172cb581f0.tar.bz2 | |
Convert Optional<CodeModel> to std::optional<CodeModel>
Diffstat (limited to 'llvm/lib/Target/Sparc/SparcTargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcTargetMachine.cpp | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp index 8bd51a7..ed61f50 100644 --- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp +++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp @@ -18,6 +18,7 @@ #include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/IR/LegacyPassManager.h" #include "llvm/MC/TargetRegistry.h" +#include <optional> using namespace llvm; extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTarget() { @@ -69,7 +70,7 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) { // // All code models require that the text segment is smaller than 2GB. static CodeModel::Model -getEffectiveSparcCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM, +getEffectiveSparcCodeModel(std::optional<CodeModel::Model> CM, Reloc::Model RM, bool Is64Bit, bool JIT) { if (CM) { if (*CM == CodeModel::Tiny) @@ -87,10 +88,13 @@ getEffectiveSparcCodeModel(Optional<CodeModel::Model> CM, Reloc::Model RM, } /// Create an ILP32 architecture model -SparcTargetMachine::SparcTargetMachine( - const Target &T, const Triple &TT, StringRef CPU, StringRef FS, - const TargetOptions &Options, Optional<Reloc::Model> RM, - Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool is64bit) +SparcTargetMachine::SparcTargetMachine(const Target &T, const Triple &TT, + StringRef CPU, StringRef FS, + const TargetOptions &Options, + Optional<Reloc::Model> RM, + std::optional<CodeModel::Model> CM, + CodeGenOpt::Level OL, bool JIT, + bool is64bit) : LLVMTargetMachine(T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options, getEffectiveRelocModel(RM), getEffectiveSparcCodeModel( @@ -188,7 +192,7 @@ SparcV8TargetMachine::SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, - Optional<CodeModel::Model> CM, + std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} @@ -198,7 +202,7 @@ SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, - Optional<CodeModel::Model> CM, + std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} @@ -208,6 +212,6 @@ SparcelTargetMachine::SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, - Optional<CodeModel::Model> CM, + std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} |