diff options
author | James Y Knight <jyknight@google.com> | 2022-11-20 20:41:42 -0500 |
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committer | James Y Knight <jyknight@google.com> | 2022-12-07 14:37:08 -0500 |
commit | 099001979fe82a069d5572dffea472b339878c75 (patch) | |
tree | 6e0c4413427c4e070956695a9e1de4f41d5f8e52 /llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp | |
parent | 372240dfe3d5a933d9585663e15c4b6173ff23c8 (diff) | |
download | llvm-099001979fe82a069d5572dffea472b339878c75.zip llvm-099001979fe82a069d5572dffea472b339878c75.tar.gz llvm-099001979fe82a069d5572dffea472b339878c75.tar.bz2 |
[SPARC] Simplify instruction decoder.
After https://reviews.llvm.org/D137653 named sub-operands can be used
in the auto-generated instruction decoders. This allows the
auto-generated decoders to work properly, so all the hand-coded
decoders in the sparc target can be removed.
In some instances, a manually-written decoder had not been implemented
for an instruction, and thus that instruction was not decoded
properly. These have been fixed (and tests added).
Differential Revision: https://reviews.llvm.org/D137727
Diffstat (limited to 'llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp')
-rw-r--r-- | llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp | 357 |
1 files changed, 15 insertions, 342 deletions
diff --git a/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp b/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp index 6a132ed..496c08f 100644 --- a/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp +++ b/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp @@ -155,11 +155,15 @@ static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, static DecodeStatus DecodeI64RegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder) { - if (RegNo > 31) - return MCDisassembler::Fail; - unsigned Reg = IntRegDecoderTable[RegNo]; - Inst.addOperand(MCOperand::createReg(Reg)); - return MCDisassembler::Success; + return DecodeIntRegsRegisterClass(Inst, RegNo, Address, Decoder); +} + +// This is used for the type "ptr_rc", which is either IntRegs or I64Regs +// depending on SparcRegisterInfo::getPointerRegClass. +static DecodeStatus DecodePointerLikeRegClass0(MCInst &Inst, unsigned RegNo, + uint64_t Address, + const MCDisassembler *Decoder) { + return DecodeIntRegsRegisterClass(Inst, RegNo, Address, Decoder); } static DecodeStatus DecodeFPRegsRegisterClass(MCInst &Inst, unsigned RegNo, @@ -195,9 +199,9 @@ static DecodeStatus DecodeQFPRegsRegisterClass(MCInst &Inst, unsigned RegNo, return MCDisassembler::Success; } -static DecodeStatus DecodeCPRegsRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, - const MCDisassembler *Decoder) { +static DecodeStatus +DecodeCoprocRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; unsigned Reg = CPRegDecoderTable[RegNo]; @@ -248,9 +252,9 @@ static DecodeStatus DecodeIntPairRegisterClass(MCInst &Inst, unsigned RegNo, return S; } -static DecodeStatus DecodeCPPairRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, - const MCDisassembler *Decoder) { +static DecodeStatus +DecodeCoprocPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -259,56 +263,10 @@ static DecodeStatus DecodeCPPairRegisterClass(MCInst &Inst, unsigned RegNo, return MCDisassembler::Success; } -static DecodeStatus DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeLoadIntPair(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeLoadDFP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeLoadQFP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeLoadCP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeLoadCPPair(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeStoreInt(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeStoreIntPair(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeStoreFP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeStoreDFP(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeStoreCP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeStoreCPPair(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder); static DecodeStatus DecodeCall(MCInst &Inst, unsigned insn, uint64_t Address, const MCDisassembler *Decoder); static DecodeStatus DecodeSIMM13(MCInst &Inst, unsigned insn, uint64_t Address, const MCDisassembler *Decoder); -static DecodeStatus DecodeJMPL(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeReturn(MCInst &MI, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeSWAP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeTRAP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); -static DecodeStatus DecodeFIXMEInstruction(MCInst &MI, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder); #include "SparcGenDisassemblerTables.inc" @@ -366,147 +324,6 @@ DecodeStatus SparcDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, return MCDisassembler::Fail; } -typedef DecodeStatus (*DecodeFunc)(MCInst &MI, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder); - -static DecodeStatus DecodeMem(MCInst &MI, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder, bool isLoad, - DecodeFunc DecodeRD) { - unsigned rd = fieldFromInstruction(insn, 25, 5); - unsigned rs1 = fieldFromInstruction(insn, 14, 5); - bool isImm = fieldFromInstruction(insn, 13, 1); - bool hasAsi = fieldFromInstruction(insn, 23, 1); // (in op3 field) - unsigned asi = fieldFromInstruction(insn, 5, 8); - unsigned rs2 = 0; - unsigned simm13 = 0; - if (isImm) - simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); - else - rs2 = fieldFromInstruction(insn, 0, 5); - - DecodeStatus status; - if (isLoad) { - status = DecodeRD(MI, rd, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - } - - // Decode rs1. - status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - - // Decode imm|rs2. - if (isImm) - MI.addOperand(MCOperand::createImm(simm13)); - else { - status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - } - - if (hasAsi) - MI.addOperand(MCOperand::createImm(asi)); - - if (!isLoad) { - status = DecodeRD(MI, rd, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - } - return MCDisassembler::Success; -} - -static DecodeStatus DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, true, - DecodeIntRegsRegisterClass); -} - -static DecodeStatus DecodeLoadIntPair(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, true, - DecodeIntPairRegisterClass); -} - -static DecodeStatus DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, true, - DecodeFPRegsRegisterClass); -} - -static DecodeStatus DecodeLoadDFP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, true, - DecodeDFPRegsRegisterClass); -} - -static DecodeStatus DecodeLoadQFP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, true, - DecodeQFPRegsRegisterClass); -} - -static DecodeStatus DecodeLoadCP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, true, - DecodeCPRegsRegisterClass); -} - -static DecodeStatus DecodeLoadCPPair(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, true, - DecodeCPPairRegisterClass); -} - -static DecodeStatus DecodeStoreInt(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, false, - DecodeIntRegsRegisterClass); -} - -static DecodeStatus DecodeStoreIntPair(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, false, - DecodeIntPairRegisterClass); -} - -static DecodeStatus DecodeStoreFP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, false, - DecodeFPRegsRegisterClass); -} - -static DecodeStatus DecodeStoreDFP(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, false, - DecodeDFPRegsRegisterClass); -} - -static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, false, - DecodeQFPRegsRegisterClass); -} - -static DecodeStatus DecodeStoreCP(MCInst &Inst, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, false, - DecodeCPRegsRegisterClass); -} - -static DecodeStatus DecodeStoreCPPair(MCInst &Inst, unsigned insn, - uint64_t Address, - const MCDisassembler *Decoder) { - return DecodeMem(Inst, insn, Address, Decoder, false, - DecodeCPPairRegisterClass); -} - static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t Width, MCInst &MI, @@ -531,147 +348,3 @@ static DecodeStatus DecodeSIMM13(MCInst &MI, unsigned insn, uint64_t Address, MI.addOperand(MCOperand::createImm(tgt)); return MCDisassembler::Success; } - -static DecodeStatus DecodeJMPL(MCInst &MI, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder) { - - unsigned rd = fieldFromInstruction(insn, 25, 5); - unsigned rs1 = fieldFromInstruction(insn, 14, 5); - unsigned isImm = fieldFromInstruction(insn, 13, 1); - unsigned rs2 = 0; - unsigned simm13 = 0; - if (isImm) - simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); - else - rs2 = fieldFromInstruction(insn, 0, 5); - - // Decode RD. - DecodeStatus status = DecodeIntRegsRegisterClass(MI, rd, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - - // Decode RS1. - status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - - // Decode RS1 | SIMM13. - if (isImm) - MI.addOperand(MCOperand::createImm(simm13)); - else { - status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - } - return MCDisassembler::Success; -} - -static DecodeStatus DecodeReturn(MCInst &MI, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder) { - - unsigned rs1 = fieldFromInstruction(insn, 14, 5); - unsigned isImm = fieldFromInstruction(insn, 13, 1); - unsigned rs2 = 0; - unsigned simm13 = 0; - if (isImm) - simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); - else - rs2 = fieldFromInstruction(insn, 0, 5); - - // Decode RS1. - DecodeStatus status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - - // Decode RS2 | SIMM13. - if (isImm) - MI.addOperand(MCOperand::createImm(simm13)); - else { - status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - } - return MCDisassembler::Success; -} - -// This instruction does not have a working decoder, and needs to be -// fixed. This "fixme" function was introduced to keep the backend compiling, -// while making changes to tablegen code. -static DecodeStatus DecodeFIXMEInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, - const MCDisassembler *Decoder) { - return MCDisassembler::Fail; -} - -static DecodeStatus DecodeSWAP(MCInst &MI, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder) { - - unsigned rd = fieldFromInstruction(insn, 25, 5); - unsigned rs1 = fieldFromInstruction(insn, 14, 5); - unsigned isImm = fieldFromInstruction(insn, 13, 1); - bool hasAsi = fieldFromInstruction(insn, 23, 1); // (in op3 field) - unsigned asi = fieldFromInstruction(insn, 5, 8); - unsigned rs2 = 0; - unsigned simm13 = 0; - if (isImm) - simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13)); - else - rs2 = fieldFromInstruction(insn, 0, 5); - - // Decode RD. - DecodeStatus status = DecodeIntRegsRegisterClass(MI, rd, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - - // Decode RS1. - status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - - // Decode RS1 | SIMM13. - if (isImm) - MI.addOperand(MCOperand::createImm(simm13)); - else { - status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - } - - if (hasAsi) - MI.addOperand(MCOperand::createImm(asi)); - - return MCDisassembler::Success; -} - -static DecodeStatus DecodeTRAP(MCInst &MI, unsigned insn, uint64_t Address, - const MCDisassembler *Decoder) { - - unsigned rs1 = fieldFromInstruction(insn, 14, 5); - unsigned isImm = fieldFromInstruction(insn, 13, 1); - unsigned cc =fieldFromInstruction(insn, 25, 4); - unsigned rs2 = 0; - unsigned imm7 = 0; - if (isImm) - imm7 = fieldFromInstruction(insn, 0, 7); - else - rs2 = fieldFromInstruction(insn, 0, 5); - - // Decode RS1. - DecodeStatus status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - - // Decode RS1 | IMM7. - if (isImm) - MI.addOperand(MCOperand::createImm(imm7)); - else { - status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder); - if (status != MCDisassembler::Success) - return status; - } - - // Decode CC - MI.addOperand(MCOperand::createImm(cc)); - - return MCDisassembler::Success; -} |