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author | Eric Christopher <echristo@gmail.com> | 2014-08-04 21:25:23 +0000 |
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committer | Eric Christopher <echristo@gmail.com> | 2014-08-04 21:25:23 +0000 |
commit | d913448b38bab6ace92ae5057b917eb57035f83b (patch) | |
tree | f2050928fa5994c44fab60d66e7d89e7cc7d7a4f /llvm/lib/Target/Sparc/DelaySlotFiller.cpp | |
parent | acc8ef273b1c3796b0fc7f19aa347115b4bc2ea4 (diff) | |
download | llvm-d913448b38bab6ace92ae5057b917eb57035f83b.zip llvm-d913448b38bab6ace92ae5057b917eb57035f83b.tar.gz llvm-d913448b38bab6ace92ae5057b917eb57035f83b.tar.bz2 |
Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.
llvm-svn: 214781
Diffstat (limited to 'llvm/lib/Target/Sparc/DelaySlotFiller.cpp')
-rw-r--r-- | llvm/lib/Target/Sparc/DelaySlotFiller.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/Sparc/DelaySlotFiller.cpp b/llvm/lib/Target/Sparc/DelaySlotFiller.cpp index f3441ffcf..28369fd 100644 --- a/llvm/lib/Target/Sparc/DelaySlotFiller.cpp +++ b/llvm/lib/Target/Sparc/DelaySlotFiller.cpp @@ -110,7 +110,7 @@ FunctionPass *llvm::createSparcDelaySlotFillerPass(TargetMachine &tm) { bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) { bool Changed = false; - const TargetInstrInfo *TII = TM.getInstrInfo(); + const TargetInstrInfo *TII = TM.getSubtargetImpl()->getInstrInfo(); for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ) { MachineBasicBlock::iterator MI = I; @@ -187,7 +187,7 @@ Filler::findDelayInstr(MachineBasicBlock &MBB, if (J->getOpcode() == SP::RESTORErr || J->getOpcode() == SP::RESTOREri) { // change retl to ret. - slot->setDesc(TM.getInstrInfo()->get(SP::RET)); + slot->setDesc(TM.getSubtargetImpl()->getInstrInfo()->get(SP::RET)); return J; } } @@ -329,7 +329,8 @@ void Filler::insertDefsUses(MachineBasicBlock::iterator MI, bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) { // Check Reg and all aliased Registers. - for (MCRegAliasIterator AI(Reg, TM.getRegisterInfo(), true); + for (MCRegAliasIterator AI(Reg, TM.getSubtargetImpl()->getRegisterInfo(), + true); AI.isValid(); ++AI) if (RegSet.count(*AI)) return true; @@ -482,7 +483,7 @@ bool Filler::tryCombineRestoreWithPrevInst(MachineBasicBlock &MBB, if (PrevInst->isBundledWithSucc()) return false; - const TargetInstrInfo *TII = TM.getInstrInfo(); + const TargetInstrInfo *TII = TM.getSubtargetImpl()->getInstrInfo(); switch (PrevInst->getOpcode()) { default: break; |