diff options
| author | Philip Reames <preames@rivosinc.com> | 2023-08-31 11:18:40 -0700 |
|---|---|---|
| committer | Philip Reames <listmail@philipreames.com> | 2023-08-31 11:20:06 -0700 |
| commit | 1c43aa44d8bb7c62fb8ae703e671367a54a37da5 (patch) | |
| tree | 65fca8b4f46ae2d8662ac513aa37379de04fe7b1 /llvm/lib/Target/RISCV/RISCVSubtarget.cpp | |
| parent | d1c3784adfb54594fd1d6b3f76aac017099f21a5 (diff) | |
| download | llvm-1c43aa44d8bb7c62fb8ae703e671367a54a37da5.zip llvm-1c43aa44d8bb7c62fb8ae703e671367a54a37da5.tar.gz llvm-1c43aa44d8bb7c62fb8ae703e671367a54a37da5.tar.bz2 | |
[RISCV] Kill off redundant field XLenVT [nfc]
We're already tracking XLen, we can compute XLenVt from that. Note that XLen itself should probably be driven from IsRV64 (the processor flag), but I'm leaving that to a separate change (with review).
Diffstat (limited to 'llvm/lib/Target/RISCV/RISCVSubtarget.cpp')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVSubtarget.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.cpp b/llvm/lib/Target/RISCV/RISCVSubtarget.cpp index c2d4281..bd43981 100644 --- a/llvm/lib/Target/RISCV/RISCVSubtarget.cpp +++ b/llvm/lib/Target/RISCV/RISCVSubtarget.cpp @@ -66,10 +66,8 @@ RISCVSubtarget::initializeSubtargetDependencies(const Triple &TT, StringRef CPU, TuneCPU = CPU; ParseSubtargetFeatures(CPU, TuneCPU, FS); - if (Is64Bit) { - XLenVT = MVT::i64; + if (Is64Bit) XLen = 64; - } TargetABI = RISCVABI::computeTargetABI(TT, getFeatureBits(), ABIName); RISCVFeatures::validate(TT, getFeatureBits()); |